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FinFET-a self-aligned double-gate MOSFET scalable to 20 nm

IEEE Transactions on Electron Devices · 2000 · Vol. 47(12) · pp. 2320–2325

Chenming Hu✉(University of California, Berkeley)Jeffrey Bokor(University of California, Berkeley)Tsu‐Jae King(University of California, Berkeley)Erik Anderson(Lawrence Berkeley National Laboratory)C. Kuo(University of California, Berkeley)K. Asano(University of California, Berkeley)Hideki Takeuchi(University of California, Berkeley)J. Kedzierski(University of California, Berkeley)Wen‐Chin Lee(University of California, Berkeley)Digh Hisamoto(Hitachi (Japan))

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Abstract

MOSFETs with gate length down to 17 nm are reported. To suppress the short channel effect, a novel self-aligned double-gate MOSFET, FinFET, is proposed. By using boron-doped Si/sub 0.4/Ge/sub 0.6/ as a gate material, the desired threshold voltage was achieved for the ultrathin body device. The quasiplanar nature of this new variant of the vertical double-gate MOSFETs can be fabricated relatively easily using the conventional planar MOSFET process technologies.

Semiconductor materials and devices Advancements in Semiconductor Devices and Circuit Design Silicon Carbide Semiconductor TechnologiesMOSFETMaterials sciencePlanarOptoelectronicsDouble gateLogic gateThreshold voltageShort-channel effectElectrical engineeringVoltage