article Open AccessTop 1% cited
Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: practical design aspects
IEEE Transactions on Nuclear Science · 1999 · Vol. 46(6) · pp. 1690–1696
G. Anelli✉(European Organization for Nuclear Research)M. Campbell(European Organization for Nuclear Research)M. Delmastro(European Organization for Nuclear Research)F. Faccio(European Organization for Nuclear Research)S. Floria(European Organization for Nuclear Research)A. Giraldo(European Organization for Nuclear Research)E.H.M. Heijne(European Organization for Nuclear Research)P. Jarron(European Organization for Nuclear Research)K. Kloukinas(European Organization for Nuclear Research)A. Marchioro(European Organization for Nuclear Research)P. Moreira(European Organization for Nuclear Research)W. Snoeys(European Organization for Nuclear Research)
Abstract
We discuss design issues related to the extensive use of Enclosed Layout Transistors (ELT's) and guard rings in deep submicron CMOS technologies in order to improve radiation tolerance of ASIC's designed for the LHC experiments (the Large Hadron Collider at present under construction at CERN). We present novel aspects related to the use of ELT's: noise measured before and after irradiation up to 100 Mrad (SiO/sub 2/), a model to calculate the W/L ratio and matching properties of these devices. Some conclusions concerning the density and the speed of IC's conceived with this design approach are finally drawn.
Radiation Effects in ElectronicsAdvancements in Semiconductor Devices and Circuit DesignSemiconductor materials and devicesLarge Hadron ColliderCMOSApplication-specific integrated circuitRadiation hardeningVery-large-scale integrationTransistorElectronic engineeringRadiationComputer sciencePhysics
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369
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21.95
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15
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Cited by
Radiation effects and hardening of MOS technology: devices and circuits
IEEE Transactions on Nuclear Science · 2003 · 314 citations
References
Challenges in hardening technologies using shallow-trench isolation
IEEE Transactions on Nuclear Science · 1998 · 244 citations
Matching properties of MOS transistors
IEEE Journal of Solid-State Circuits · 1989 · 3,274 citations
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