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Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

Proceedings of the IEEE · 1996 · Vol. 84(11) · pp. 1584–1614
Christian EnzGábor C. Temes

Abstract

In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.

Analog and Mixed-Signal Circuit DesignAdvancements in PLL and VCO TechnologiesVLSI and Analog Circuit TestingInput offset voltageChopperOperational amplifierOp amp integratorElectrical engineeringCorrelated double samplingElectronic engineeringAmplifierOffset (computer science)CMOS
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References
Design techniques for high-speed, high-resolution comparators
IEEE Journal of Solid-State Circuits · 1992 · 504 citations
A 4-MHz CMOS continuous-time filter with on-chip automatic tuning
IEEE Journal of Solid-State Circuits · 1988 · 698 citations
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