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A 4-MHz CMOS continuous-time filter with on-chip automatic tuning

IEEE Journal of Solid-State Circuits · 1988 · Vol. 23(3) · pp. 750–758
F. KrummenacherN. Joehl

Abstract

A third-order elliptic low-pass continuous-time filter with a 4-MHz cutoff frequency, integrated in a 3- mu m p-well CMOS process, is presented. The design procedure is based on the direct simulation of a doubly terminated LC ladder filter by capacitors and fully balanced, current-controlled transconductance amplifiers with extended linear range. The on-chip automatic tuning circuit uses a phase-locked loop implemented with an 8.5-MHz controlled oscillator that matches a specific two-integrator loop of the filter. The complete circuit features 70-dB dynamic range (THD<-50 dB) and consumes only 16 mW from +or-2.5-V supplies.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Analog and Mixed-Signal Circuit DesignAdvancements in PLL and VCO TechnologiesAdvanced Adaptive Filtering TechniquesIntegratorTransconductanceFilter (signal processing)CMOSCapacitorLow-pass filterCutoff frequencyChipElectronic engineeringComputer science
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