A novel CMOS bandgap reference with curvature correction using subthreshold MOSFETS for enhanced thermal stability and low-power applications

Abstract

This study presents a novel CMOS bandgap reference (BGR) circuit with curvature correction using subthreshold metal-oxide-semiconductor field-effect transistors (MOSFETs), aimed at achieving enhanced thermal stability and low-power operation. The primary objectives were to develop a thermally stable BGR circuit, optimize power consumption, and validate the design’s robustness under varying environmental and process conditions. The proposed design leverages the exponential current-voltage characteristics of subthreshold MOSFETs to implement advanced curvature correction, addressing the inherent non-linearities in traditional BGR circuits. The circuit was designed and simulated using a standard 180 nm CMOS process, with post-layout validation ensuring reliability against parasitic effects. Experimental prototypes were fabricated and tested to confirm theoretical predictions.Simulation results demonstrated an output voltage of 1.235 V at 25°C with a thermal drift of 2.3 ppm/°C, while experimental measurements closely aligned, showing an output voltage of 1.238 V and a thermal drift of 2.5 ppm/°C across the temperature range of -40°C to 125°C. Power consumption was recorded at 3.6 µW, making the design suitable for battery-powered and portable applications. Monte Carlo simulations and process corner analyses confirmed minimal deviation, with a standard deviation of 1.9 mV in output voltage, indicating excellent process variation resilience. Statistical analyses, including ANOVA and correlation studies, validated the reliability and reproducibility of the design.The proposed circuit addresses key limitations of conventional BGR designs by achieving superior thermal stability and power efficiency, providing a robust solution for modern electronic systems such as IoT devices and portable medical instruments. Practical recommendations for further optimization include exploring advanced fabrication technologies, adaptive biasing, and system-on-chip integration. This work contributes significantly to the advancement of energy-efficient analog circuit design.