articleTop 1% cited
MOS capacitance measurements for high-leakage thin dielectrics
IEEE Transactions on Electron Devices · 1999 · Vol. 46(7) · pp. 1500–1501
Kevin Yang✉(University of California, Berkeley)Chenming Hu(University of California, Berkeley)
Abstract
As oxide thickness is reduced below 2.5 nm in MOS devices, both series and shunt parasitic resistances become significant in capacitance-voltage (C-V) measurements. A new technique is presented which allows the frequency-independent device capacitance to be accurately extracted from impedance measurements at two frequencies. This technique is demonstrated for a 1.7 nm SiO/sub 2/ capacitor.
Semiconductor materials and devicesAdvancements in Semiconductor Devices and Circuit DesignIntegrated Circuits and Semiconductor Failure AnalysisCapacitanceCapacitorMaterials scienceDielectricOptoelectronicsParasitic capacitanceLeakage (economics)Electrical impedanceElectrical engineeringVoltage
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