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The Indirect Binary n-Cube Microprocessor Array

IEEE Transactions on Computers · 1977 · Vol. C-26(5) · pp. 458–473
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Abstract

This paper explores the possibility of using a large-scale array of microprocessors as a computational facility for the execution of massive numerical computations with a high degree of parallelism. By microprocessor we mean a processor realized on one or a few semiconductor chips that include arithmetic and logical facilities and some memory. The current state of LSI technology makes this approach a feasible and attractive candidate for use in a macrocomputer facility.

Interconnection Networks and SystemsParallel Computing and Optimization TechniquesEmbedded Systems Design TechniquesMicroprocessorComputer scienceParallel computingComputationState (computer science)Binary numberComputer hardwareArithmeticAlgorithmMathematics
Citations
500
FWCI
20.58
field-weighted impact
References
17
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100%
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Citations per year
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References
The ILLIAC IV Computer
IEEE Transactions on Computers · 1968 · 525 citations
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers · 1975 · 1,120 citations
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