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Performance of Processor-Memory Interconnections for Multiprocessors

IEEE Transactions on Computers · 1981 · Vol. C-30(10) · pp. 771–780
Patel

Abstract

A class of interconnection networks based on some existing permutation networks is described with applications to processor to memory communication in multiprocessing systems. These networks, termed delta networks, allow a direct link between any processor to any memory module. The delta networks and full crossbars are analyzed with respect to their effective bandwidth and cost. The analysis shows that delta networks have a far better performance per cost than crossbars in large multiprocessing systems.

Interconnection Networks and SystemsParallel Computing and Optimization TechniquesLow-power high-performance VLSI designComputer scienceMultiprocessingParallel computingInterconnectionMultistage interconnection networksShared memoryMemory bandwidthBandwidth (computing)Distributed memoryClass (philosophy)
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713
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Cited by
The Performance of Multistage Interconnection Networks for Multiprocessors
IEEE Transactions on Computers · 1983 · 540 citations
References
Parallel Processing with the Perfect Shuffle
IEEE Transactions on Computers · 1971 · 1,254 citations
The Indirect Binary n-Cube Microprocessor Array
IEEE Transactions on Computers · 1977 · 500 citations
Access and Alignment of Data in an Array Processor
IEEE Transactions on Computers · 1975 · 1,120 citations
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