article
High speed Vedic multiplier design and implementation on FPGA
International journal of applied research · 2015 · Vol. 1(7) · pp. 239–244
Low-power high-performance VLSI designQuantum-Dot Cellular AutomataEvolutionary Algorithms and ApplicationsMultiplier (economics)Field-programmable gate arrayArithmeticComputer scienceMathematicsComputer architectureEmbedded systemEconomics
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