article
Design of Low-Dropout Regulato
International journal of applied research · 2015 · Vol. 1(7) · pp. 323–330
Abstract
For diminishing the standby power and boosting the effectiveness of battery life time in portable and handheld devices, power management is required. Low Dropout regulator is one of such a power management module. Proposed LDO design converts an input voltage of 1 V to tunable output voltage range of 0.5 V to 0.932 V which is implemented in 90nm technology. The designed LDO has a very less quiescent current of 0.4µA and less dropout voltage of 68mV producing a current efficiency of 99.99%.
Sensor Technology and Measurement SystemsAnalog and Mixed-Signal Circuit DesignCCD and CMOS Imaging SensorsLow-dropout regulatorDropout voltageDropout (neural networks)Power managementVoltageElectrical engineeringBoosting (machine learning)Power (physics)Voltage regulatorComputer science
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