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Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSIs

IEEE Transactions on Electron Devices · 1993 · Vol. 40(1) · pp. 118–124
T. Sakurai

Abstract

A closed-form formula for a waveform of the RC interconnection line with practical boundary conditions is derived. Expressions are also derived for the voltage slope and transition time of the RC interconnection and for coupling capacitance and crosstalk voltage height, which can be used in VLSI designs. Using the expressions, the optimum linewidth that minimizes RC delay and the trend of RC delay in the scaled-down VLSIs are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Low-power high-performance VLSI designAnalog and Mixed-Signal Circuit DesignElectromagnetic Compatibility and Noise SuppressionInterconnectionCapacitanceCrosstalkVery-large-scale integrationWaveformLaser linewidthVoltageElectronic engineeringCoupling (piping)Topology (electrical circuits)
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