articleTop 10% cited
Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSIs
IEEE Transactions on Electron Devices · 1993 · Vol. 40(1) · pp. 118–124
T. Sakurai✉(Toshiba (Japan))
Abstract
A closed-form formula for a waveform of the RC interconnection line with practical boundary conditions is derived. Expressions are also derived for the voltage slope and transition time of the RC interconnection and for coupling capacitance and crosstalk voltage height, which can be used in VLSI designs. Using the expressions, the optimum linewidth that minimizes RC delay and the trend of RC delay in the scaled-down VLSIs are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
Low-power high-performance VLSI designAnalog and Mixed-Signal Circuit DesignElectromagnetic Compatibility and Noise SuppressionInterconnectionCapacitanceCrosstalkVery-large-scale integrationWaveformLaser linewidthVoltageElectronic engineeringCoupling (piping)Topology (electrical circuits)
Citations
597
FWCI
5.91
field-weighted impact
References
12
Percentile
96%
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References
The Transient Response of Damped Linear Networks with Particular Regard to Wideband Amplifiers
Journal of Applied Physics · 1948 · 1,768 citations
Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas
IEEE Journal of Solid-State Circuits · 1990 · 1,656 citations
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